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发表于 14-9-2006 07:02 PM
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ALTERA 面试的消息!!! EE 或 TELE
Hi guys,
You should have heard that we’re hiring 150 to 200 employees for next year. I’ll be in UM next week on 18 September, 06 (Monday) from 9am to 5.30pm at BS3, Level 2, Engineering Tower. Feel free to share the following info with your juniors who are interested.
We are looking for suitable candidates for the following positions:
· Applications Engineers
· CAD Engineers
· CAD Methodology Engineers
· Intellectual Property Design Engineers
· IC/ASIC Design Engineers
· Product / Characterization Engineers
· Software Engineers
· Software Systems Development Engineers
· Test Development/ Engineering Engineers
· VLSI Mask Layout Design Engineers
Job description as attached.
Requirements: Masters/ Degree in Electronics/ Electrical/ Mechatronics/ Telecommunications/ Computer/ Software graduating in 2007
Info session: Those who are interested to know more about Altera are welcome to attend a 30-minute Introduction to Altera presentation followed by a Q&A session.
Technical Assessment: We will be holding a technical assessment after the talk. The purpose is to match your background to the positions above. There are only about 15 questions and you’ll only need to answer those which you know. A bonus for those who attempt more. Topics covered include:
· CMOS: transistor level circuit, cross section, stick diagram, fabrication process
· Electronic circuits: RLC circuit
· C/C++ programming
· Verilog/ VHDL
· Digital Logic: Multiplexer, Shift register, synchronous circuit
· Timing Analysis
· Microprocessors |
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